2 search results - page 1 / 1 » AES on FPGA from the Fastest to the Smallest |
CHES
2005
Springer
14 years 17 days ago
2005
Springer
Two new FPGA designs for the Advanced Encryption Standard (AES) are presented. The first is believed to be the fastest, achieving 25 Gbps throughput using a Xilinx Spartan-III (XC3...
ACSAC
2009
IEEE
14 years 1 months ago
2009
IEEE
—We take a systematic approach to developing a symmetric cryptography library in Javascript. We study various strategies for optimizing the code for the Javascript interpreter, a...