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GROUP
1999
ACM
14 years 1 months ago
1999
ACM
This paper addresses issues of user interface design, relating to ease of use, of handheld CSCW. In particular, we are concerned with the requirements that arise from situations i...
SIGCSE
1999
ACM
14 years 1 months ago
1999
ACM
The wide-spread use of microprocessor based systems that utilize cache memory to alleviate excessively long DRAM access times introduces a new dimension in the quest to obtain goo...
HPCA
1999
IEEE
14 years 1 months ago
1999
IEEE
Control independence has been put forward as a significant new source of instruction-level parallelism for future generation processors. However, its performance potential under p...
IEEEPACT
1999
IEEE
14 years 1 months ago
1999
IEEE
Increases in instruction level parallelism are needed to exploit the potential parallelism available in future wide issue architectures. Predicated execution is an architectural m...
IEEEPACT
1999
IEEE
14 years 1 months ago
1999
IEEE
Trace cache, an instruction fetch technique that reduces taken branch penalties by storing and fetching program instructions in dynamic execution order, dramatically improves inst...