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DAC
2005
ACM
14 years 9 months ago
StressTest: an automatic approach to test generation via activity monitors
The challenge of verifying a modern microprocessor design is an overwhelming one: Increasingly complex micro-architectures combined with heavy time-to-market pressure have forced ...
Ilya Wagner, Valeria Bertacco, Todd M. Austin
HASE
2008
IEEE
13 years 8 months ago
Aiding Modular Design and Verification of Safety-Critical Time-Triggered Systems by Use of Executable Formal Specifications
Designing safety-critical systems is a complex process, and especially when the design is carried out at different f abstraction where the correctness of the design at one level i...
Kohei Sakurai, Péter Bokor, Neeraj Suri
TASE
2008
IEEE
13 years 8 months ago
Modeling and Supervisory Control of Railway Networks Using Petri Nets
In this paper we deal with the problem of modeling railway networks with Petri nets so as to apply the theory of supervisory control for discrete event systems to automatically de...
Alessandro Giua, Carla Seatzu
CODES
2006
IEEE
14 years 2 months ago
Creation and utilization of a virtual platform for embedded software optimization: : an industrial case study
Virtual platform (ViP), or ESL (Electronic System Level) simulation model, is one of the most widely renowned system level design techniques. In this paper, we present a case stud...
Sungpack Hong, Sungjoo Yoo, Sheayun Lee, Sangwoo L...
IAT
2005
IEEE
14 years 2 months ago
A Flexible BDI Architecture Supporting Extensibility
The BDI agent model comprises a simple but efficient folk psychological framework of mentalistic notions usable for modeling rational agent behaviour. Nevertheless, despite its u...
Alexander Pokahr, Lars Braubach, Winfried Lamersdo...