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CAV
2007
Springer
227views Hardware» more  CAV 2007»
14 years 1 months ago
The TASM Toolset: Specification, Simulation, and Formal Verification of Real-Time Systems
Abstract. In this paper, we describe the features of the Timed Abstract State Machine toolset. The toolset implements the features of the Timed Abstract State Machine (TASM) langua...
Martin Ouimet, Kristina Lundqvist
QSIC
2003
IEEE
14 years 3 months ago
Validating Use-Cases with the AsmL Test Tool
The Abstract State Machine Language supports use-case oriented modeling in a faithful way. In this paper we discuss how the AsmL test tool, a new component of the AsmL tool environ...
Michael Barnett, Wolfgang Grieskamp, Wolfram Schul...
APCSAC
2001
IEEE
14 years 1 months ago
Stacking them up: a Comparison of Virtual Machines
A popular trend in current software technology is to gain program portability by compiling programs to an inte form based on an abstract machine definition. Such approaches date b...
K. John Gough
ASM
2008
ASM
13 years 12 months ago
Using EventB to Create a Virtual Machine Instruction Set Architecture
A Virtual Machine (VM) is a program running on a conventional microprocessor that emulates the binary instruction set, registers, and memory space of an idealized computing machine...
Stephen Wright
CC
2006
Springer
125views System Software» more  CC 2006»
14 years 1 months ago
Converting Intermediate Code to Assembly Code Using Declarative Machine Descriptions
Abstract. Writing an optimizing back end is expensive, in part because it requires mastery of both a target machine and a compiler's internals. We separate these concerns by i...
João Dias, Norman Ramsey