229 search results - page 38 / 46 » Accelerating SIFT on parallel architectures |
210
Voted
ARC
2012
Springer
13 years 11 months ago
2012
Springer
Iterative numerical algorithms with high memory bandwidth requirements but medium-size data sets (matrix size ∼ a few 100s) are highly appropriate for FPGA acceleration. This pap...
137
Voted
VLSISP
2008
15 years 3 months ago
2008
Advanced bit manipulation operations are not efficiently supported by commodity word-oriented microprocessors. Programming tricks are typically devised to shorten the long sequence...
132
Voted
IPPS
2009
IEEE
15 years 10 months ago
2009
IEEE
Abstract—Recent years have seen a trend in using graphic processing units (GPU) as accelerators for general-purpose computing. The inexpensive, single-chip, massively parallel ar...
126
Voted
IPPS
2008
IEEE
15 years 10 months ago
2008
IEEE
High performance computing is critical for financial markets where analysts seek to accelerate complex optimizations such as pricing engines to maintain a competitive edge. In th...
152
Voted
IPPS
2006
IEEE
15 years 9 months ago
2006
IEEE
— This paper presents work-in-progress towards a C++ source-to-source translator that automatically seeks parallelisable code fragments and replaces them with code for a graphics...