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» Accelerating SIFT on parallel architectures
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ASPLOS
2009
ACM
14 years 9 months ago
QR decomposition on GPUs
QR decomposition is a computationally intensive linear algebra operation that factors a matrix A into the product of a unitary matrix Q and upper triangular matrix R. Adaptive sys...
Andrew Kerr, Dan Campbell, Mark Richards
DAMON
2009
Springer
14 years 3 months ago
Frequent itemset mining on graphics processors
We present two efficient Apriori implementations of Frequent Itemset Mining (FIM) that utilize new-generation graphics processing units (GPUs). Our implementations take advantage ...
Wenbin Fang, Mian Lu, Xiangye Xiao, Bingsheng He, ...
IPPS
2007
IEEE
14 years 2 months ago
Porting the GROMACS Molecular Dynamics Code to the Cell Processor
The Cell processor offers substantial computational power which can be effectively utilized only if application design and implementation are tuned to the Cell architecture. In th...
Stephen Olivier, Jan Prins, Jeff Derby, Ken V. Vu
ISBI
2007
IEEE
14 years 2 months ago
Real-Time Mutual-Information-Based Linear Registration on the Cell Broadband Engine Processor
Emerging multi-core processors are able to accelerate medical imaging applications by exploiting the parallelism available in their algorithms. We have implemented a mutual-inform...
Moriyoshi Ohara, Hangu Yeo, Frank Savino, Giridhar...
IPPS
2006
IEEE
14 years 2 months ago
Design flow for optimizing performance in processor systems with on-chip coarse-grain reconfigurable logic
A design flow for processor platforms with on-chip coarse-grain reconfigurable logic is presented. The reconfigurable logic is realized by a 2-Dimensional Array of Processing Elem...
Michalis D. Galanis, Grigoris Dimitroulakos, Const...