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ASAP
2008
IEEE
186views Hardware» more  ASAP 2008»
14 years 4 months ago
Accelerating Nussinov RNA secondary structure prediction with systolic arrays on FPGAs
RNA structure prediction, or folding, is a computeintensive task that lies at the core of several search applications in bioinformatics. We begin to address the need for high-thro...
Arpith C. Jacob, Jeremy Buhler, Roger D. Chamberla...
GLOBECOM
2007
IEEE
14 years 1 months ago
Accelerating Service Discovery in Ad-Hoc Zero Configuration Networking
Zero Configuration Networking (Zeroconf) assigns IP addresses and host names, and discovers service without a central server. Zeroconf can be used in wireless mobile ad-hoc network...
Se Gi Hong, Suman Srinivasan, Henning Schulzrinne
FCCM
2009
IEEE
106views VLSI» more  FCCM 2009»
14 years 1 months ago
Optimal Placement-aware Trace-Based Scheduling of Hardware Reconfigurations for FPGA Accelerators
Modern use of FPGAs as hardware accelerators involves the partial reconfiguration of hardware resources as the application executes. In this paper, we present a polynomial time al...
Joon Edward Sim, Weng-Fai Wong, Jürgen Teich
ESTIMEDIA
2006
Springer
14 years 1 months ago
FPGA accelerator for real-time skin segmentation
Many real-time image processing applications are confronted with performance limitations when implemented in software. The skin segmentation algorithm utilized in hand gesture rec...
Bart de Ruijsscher, Georgi Gaydadjiev, Jeroen Lich...
WSCG
2003
158views more  WSCG 2003»
13 years 11 months ago
Comparison of Accelerating Techniques for Discontinuity Meshing
Creating an appropriate mesh is one of demanding tasks of many global illumination algorithms. Discontinuity meshing proved to diminish artifacts caused by other meshing strategie...
Karel Nechvíle, Petr Tobola, Jiri Sochor