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JAIR
2006
120views more  JAIR 2006»
13 years 8 months ago
FluCaP: A Heuristic Search Planner for First-Order MDPs
We present a heuristic search algorithm for solving first-order Markov Decision Processes (FOMDPs). Our approach combines first-order state abstraction that avoids evaluating stat...
Steffen Hölldobler, Eldar Karabaev, Olga Skvo...
ISCA
2012
IEEE
244views Hardware» more  ISCA 2012»
11 years 11 months ago
Scheduling heterogeneous multi-cores through performance impact estimation (PIE)
Single-ISA heterogeneous multi-core processors are typically composed of small (e.g., in-order) power-efficient cores and big (e.g., out-of-order) high-performance cores. The eff...
Kenzo Van Craeynest, Aamer Jaleel, Lieven Eeckhout...
EWSN
2012
Springer
12 years 4 months ago
Low Power or High Performance? A Tradeoff Whose Time Has Come (and Nearly Gone)
Abstract. Some have argued that the dichotomy between high-performance operation and low resource utilization is false – an artifact that will soon succumb to Moore’s Law and c...
JeongGil Ko, Kevin Klues, Christian Richter, Wanja...
ISCA
2012
IEEE
262views Hardware» more  ISCA 2012»
11 years 11 months ago
Boosting mobile GPU performance with a decoupled access/execute fragment processor
Smartphones represent one of the fastest growing markets, providing significant hardware/software improvements every few months. However, supporting these capabilities reduces the...
Jose-Maria Arnau, Joan-Manuel Parcerisa, Polychron...
IEEEPACT
2006
IEEE
14 years 2 months ago
Communist, utilitarian, and capitalist cache policies on CMPs: caches as a shared resource
As chip multiprocessors (CMPs) become increasingly mainstream, architects have likewise become more interested in how best to share a cache hierarchy among multiple simultaneous t...
Lisa R. Hsu, Steven K. Reinhardt, Ravishankar R. I...