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IPPS
2006
IEEE
14 years 22 days ago
Design flow for optimizing performance in processor systems with on-chip coarse-grain reconfigurable logic
A design flow for processor platforms with on-chip coarse-grain reconfigurable logic is presented. The reconfigurable logic is realized by a 2-Dimensional Array of Processing Elem...
Michalis D. Galanis, Grigoris Dimitroulakos, Const...
JOT
2006
76views more  JOT 2006»
13 years 6 months ago
Architecture-Related Requirements
The engineering of architecture-related requirements has proven to be a very difficult task for requirements engineers. It is also a task that experience has shown could use signi...
Donald Firesmith, Peter Capell
ICRA
2007
IEEE
160views Robotics» more  ICRA 2007»
14 years 1 months ago
Morphing Bus: A rapid deployment computing architecture for high performance, resource-constrained robots
— For certain applications, field robotic systems require small size for cost, weight, access, stealth or other reasons. Small size results in constraints on critical resources s...
Colin D'Souza, Byung Hwa Kim, Richard M. Voyles
ECOOP
2006
Springer
13 years 10 months ago
Evolution of an Adaptive Middleware Exploiting Architectural Reflection
: Nowadays information systems are required to adapt themselves dynamically to the ever changing environment and requirements. Architectural reflection represents a principled mean...
Francesca Arcelli Fontana, Claudia Raibulet
AO
2006
128views more  AO 2006»
13 years 6 months ago
Towards ontologies for formalizing modularization and communication in large software systems
Large software systems are modularized in order to improve manageability. The parts of the software system communicate in order to achieve the desired functionality. To better und...
Daniel Oberle, Steffen Lamparter, Stephan Grimm, D...