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» Achieving High Performance with FPGA-Based Computing
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IPPS
2009
IEEE
14 years 3 months ago
Designing multi-leader-based Allgather algorithms for multi-core clusters
The increasing demand for computational cycles is being met by the use of multi-core processors. Having large number of cores per node necessitates multi-core aware designs to ext...
Krishna Chaitanya Kandalla, Hari Subramoni, Gopala...
RTSS
2008
IEEE
14 years 3 months ago
Fast Sensor Placement Algorithms for Fusion-Based Target Detection
Mission-critical target detection imposes stringent performance requirements for wireless sensor networks, such as high detection probabilities and low false alarm rates. Data fus...
Zhaohui Yuan, Rui Tan, Guoliang Xing, Chenyang Lu,...
IPPS
2008
IEEE
14 years 3 months ago
Financial modeling on the cell broadband engine
High performance computing is critical for financial markets where analysts seek to accelerate complex optimizations such as pricing engines to maintain a competitive edge. In th...
Virat Agarwal, Lurng-Kuo Liu, David A. Bader
ICPR
2006
IEEE
14 years 10 months ago
Contour Encoding Based on Extraction of Key Points Using Wavelet Transform
In many situations it is convenient to represent pictorial data in the form of contours. It may become necessary to compress such contour data for efficient storage and transmissi...
Pravas Mahapatra, Vishnu Makkapati
ICMCS
2006
IEEE
181views Multimedia» more  ICMCS 2006»
14 years 2 months ago
A Fast Downsizing Video Transcoder for H.264/AVC with Rate-Distortion Optimal Mode Decision
This paper focuses on the mode decision and motion selection problem when H.264/AVC video streams are transcoded in spatial resolution. A fast downsizing transcoding scheme is dev...
Huifeng Shen, Xiaoyan Sun, Feng Wu, Houqiang Li, S...