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ISCA
1997
IEEE
120views Hardware» more  ISCA 1997»
13 years 12 months ago
Run-Time Adaptive Cache Hierarchy Management via Reference Analysis
Improvements in main memory speeds have not kept pace with increasing processor clock frequency and improved exploitation of instruction-level parallelism. Consequently, the gap b...
Teresa L. Johnson, Wen-mei W. Hwu
IPPS
1999
IEEE
13 years 12 months ago
PM-PVM: A Portable Multithreaded PVM
PM-PVM is a portable implementation of PVM designed to work on SMP architectures supporting multithreading. PM-PVM portability is achieved through the implementation of the PVM fu...
Claudio M. P. Santos, Júlio S. Aude
PPOPP
2006
ACM
14 years 1 months ago
High-performance IPv6 forwarding algorithm for multi-core and multithreaded network processor
IP forwarding is one of the main bottlenecks in Internet backbone routers, as it requires performing the longest-prefix match at 10Gbps speed or higher. IPv6 forwarding further ex...
Xianghui Hu, Xinan Tang, Bei Hua
SPAA
2009
ACM
14 years 11 days ago
Brief announcement: a lower bound for depth-restricted work stealing
Work stealing is a common technique used in the runtime schedulers of parallel languages such as Cilk and parallel libraries such as Intel Threading Building Blocks (TBB). Depth-r...
Jim Sukha
EDO
2006
Springer
13 years 11 months ago
Improving modularity of reflective middleware with aspect-oriented programming
Reflective middleware has been proposed as an effective way to enhance adaptability of component-oriented middleware architectures. To be effectively adaptable, the implementation...
Nélio Cacho, Thaís Vasconcelos Batis...