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» Address Code and Arithmetic Optimizations for Embedded Syste...
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DAC
2000
ACM
14 years 10 months ago
Memory aware compilation through accurate timing extraction
Memory delays represent a major bottleneck in embedded systems performance. Newer memory modules exhibiting efficient access modes (e.g., page-, burst-mode) partly alleviate this ...
Peter Grun, Nikil D. Dutt, Alexandru Nicolau
RTAS
1998
IEEE
14 years 1 months ago
Bounding Loop Iterations for Timing Analysis
Static timing analyzers need to know the minimum and maximum number of iterations associated with each loop in a real-time program so accurate timing predictions can be obtained. ...
Christopher A. Healy, Mikael Sjödin, Viresh R...
ECRTS
2010
IEEE
13 years 10 months ago
Preemption Points Placement for Sporadic Task Sets
Abstract--Limited preemption scheduling has been introduced as a viable alternative to non-preemptive and fullypreemptive scheduling when reduced blocking times need to coexist wit...
Marko Bertogna, Giorgio C. Buttazzo, Mauro Marinon...
CODES
2010
IEEE
13 years 7 months ago
Statistical approach in a system level methodology to deal with process variation
The impact of process variation in state of the art technology makes traditional (worst case) designs unnecessarily pessimistic, which translates to suboptimal designs in terms of...
Concepción Sanz Pineda, Manuel Prieto, Jos&...
NSPW
2003
ACM
14 years 2 months ago
SELF: a transparent security extension for ELF binaries
The ability to analyze and modify binaries is often very useful from a security viewpoint. Security operations one would like to perform on binaries include the ability to extract...
Daniel C. DuVarney, V. N. Venkatakrishnan, Sandeep...