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» Addressing Queuing Bottlenecks at High Speeds
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HOTI
2005
IEEE
14 years 4 months ago
Addressing Queuing Bottlenecks at High Speeds
Modern routers and switch fabrics can have hundreds of input and output ports running at up to 10 Gb/s; 40 Gb/s systems are starting to appear. At these rates, the performance of ...
Sailesh Kumar, Jonathan S. Turner, Patrick Crowley

Publication
177views
15 years 9 months ago
Terabit Switching: A Survey of Techniques and Current Products
This survey paper explains the issues in designing terabit routers and the solutions for them. The discussion includes multi-layer switching, route caching, label switching, and ef...
Amit Singhal, Raj Jain
ICMCS
2000
IEEE
115views Multimedia» more  ICMCS 2000»
14 years 3 months ago
Common Time Reference for Interactive Multimedia Applications
A delay of about 100 ms gives human communicators the feeling of live interaction. Since in a global network the propagation delay alone is about 100 ms, every other delay compone...
Mario Baldi, Yoram Ofek
NOSSDAV
2004
Springer
14 years 4 months ago
Reduced state fair queuing for edge and core routers
Despite many years of research, fair queuing still faces a number of implementation challenges in high speed routers. In particular, in spite of proposals such as DiffServ, the st...
Ramana Rao Kompella, George Varghese
ARCS
2008
Springer
14 years 1 months ago
Synthesis of Multi-dimensional High-Speed FIFOs for Out-of-Order Communication
Due to increasing complexity of modern real-time image processing applications, classical hardware development at register transfer level becomes more and more the bottleneck of te...
Joachim Keinert, Christian Haubelt, Jürgen Te...