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FPGA
2010
ACM
243views FPGA» more  FPGA 2010»
14 years 6 months ago
Bit-level optimization for high-level synthesis and FPGA-based acceleration
d hardware design from behavior-level abstraction has drawn wide interest in FPGA-based acceleration and configurable computing research field. However, for many high-level progra...
Jiyu Zhang, Zhiru Zhang, Sheng Zhou, Mingxing Tan,...
WADS
2009
Springer
243views Algorithms» more  WADS 2009»
14 years 4 months ago
Resolving Loads with Positive Interior Stresses
We consider the pair (pi, fi) as a force with two-dimensional direction vector fi applied at the point pi in the plane. For a given set of forces we ask for a non-crossing geometri...
Günter Rote, André Schulz
ROCAI
2004
Springer
14 years 3 months ago
Optimizing Area Under Roc Curve with SVMs
For many years now, there is a growing interest around ROC curve for characterizing machine learning performances. This is particularly due to the fact that in real-world problems ...
Alain Rakotomamonjy
IEEEPACT
2002
IEEE
14 years 2 months ago
Using the Compiler to Improve Cache Replacement Decisions
Memory performance is increasingly determining microprocessor performance and technology trends are exacerbating this problem. Most architectures use set-associative caches with L...
Zhenlin Wang, Kathryn S. McKinley, Arnold L. Rosen...
HYBRID
1994
Springer
14 years 1 months ago
Symbolic Controller Synthesis for Discrete and Timed Systems
This paper presents algorithms for the symbolic synthesis of discrete and real-time controllers. At the semantic level the controller is synthesized by nding a winning strategy for...
Eugene Asarin, Oded Maler, Amir Pnueli