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VLSID
2005
IEEE
140views VLSI» more  VLSID 2005»
14 years 10 months ago
Variable Resizing for Area Improvement in Behavioral Synthesis
High level synthesis tools transform an algorithmic description to a register transfer language (RTL) description of the hardware. The algorithm behavior is typically described in...
R. Gopalakrishnan, Rajat Moona
ICIP
1997
IEEE
14 years 2 months ago
Image replacement through texture synthesis
Photographs and images often have regions which are in some sense flawed. Often, there may be a stain or an undesired feature covering a significant portion of the image, and an a...
Homan Igehy, Lucas Pereira
APLAS
2009
ACM
14 years 4 months ago
Bi-abductive Resource Invariant Synthesis
We describe an algorithm for synthesizing resource invariants that are used in the verification of concurrent programs. This synthesis employs bi-abductive inference to identify t...
Cristiano Calcagno, Dino Distefano, Viktor Vafeiad...
IJIT
2004
13 years 11 months ago
Synthesis of Logic Circuits Using Fractional-Order Dynamic Fitness Functions
This paper analyses the performance of a genetic algorithm using a new concept, namely a fractional-order dynamic fitness function, for the synthesis of combinational logic circuit...
Cecília Reis, José António Te...
DAC
2000
ACM
14 years 11 months ago
Unifying behavioral synthesis and physical design
eously demand shorter and less costly design cycles. Designing at higher levels of abstraction makes both objectives achievable, but enabling techniques like behavioral synthesis h...
William E. Dougherty, Donald E. Thomas