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FPL
2006
Springer
105views Hardware» more  FPL 2006»
14 years 1 months ago
A Scalable Network ASIP Enabling Flow Awareness in Ethernet Access
In this paper we research an FPGA based Application Specific Instruction Set Processor (ASIP) tailored to the needs of a flow aware Ethernet access node. The processor has an arch...
K. Van Renterghem, Dieter Verhulst, S. Verschuere,...
GECCO
2006
Springer
206views Optimization» more  GECCO 2006»
14 years 1 months ago
A dynamically constrained genetic algorithm for hardware-software partitioning
In this article, we describe the application of an enhanced genetic algorithm to the problem of hardware-software codesign. Starting from a source code written in a high-level lan...
Pierre-André Mudry, Guillaume Zufferey, Gia...
ER
2000
Springer
186views Database» more  ER 2000»
14 years 1 months ago
Conceptual Design of Electronic Product Catalogs Using Object-Oriented Hypermedia Modeling Techniques
The application of conceptual models that assure both the consistency and usability of Electronic Product Catalogs (EPC's) is a main concern in the e-commerce community, mainl...
Cristina Cachero, Jaime Gómez, Oscar Pastor
FPGA
2000
ACM
168views FPGA» more  FPGA 2000»
14 years 1 months ago
A benchmark suite for evaluating configurable computing systems--status, reflections, and future directions
This paper presents a benchmark suite for evaluating a configurable computing system's infrastructure, both tools and architecture. A novel aspect of this work is the use of ...
S. Kumar, Luiz Pires, Subburajan Ponnuswamy, C. Na...
CAV
1997
Springer
102views Hardware» more  CAV 1997»
14 years 1 months ago
Efficient Model Checking Using Tabled Resolution
We demonstrate the feasibility of using the XSB tabled logic programming system as a programmable fixed-point engine for implementing efficient local model checkers. In particular,...
Y. S. Ramakrishna, C. R. Ramakrishnan, I. V. Ramak...