Sciweavers

144 search results - page 2 / 29
» An Advanced Optimizer for the IA-64 Architecture
Sort
View
CGO
2003
IEEE
14 years 4 months ago
Speculative Register Promotion Using Advanced Load Address Table (ALAT)
The pervasive use of pointers with complicated patterns in C programs often constrains compiler alias analysis to yield conservative register allocation and promotion. Speculative...
Jin Lin, Tong Chen, Wei-Chung Hsu, Pen-Chung Yew
ACMMSP
2004
ACM
92views Hardware» more  ACMMSP 2004»
14 years 4 months ago
Instruction combining for coalescing memory accesses using global code motion
Instruction combining is an optimization to replace a sequence of instructions with a more efficient instruction yielding the same result in a fewer machine cycles. When we use it...
Motohiro Kawahito, Hideaki Komatsu, Toshio Nakatan...
CGO
2004
IEEE
14 years 2 months ago
Code Generation for Single-Dimension Software Pipelining of Multi-Dimensional Loops
Traditionally, software pipelining is applied either to the innermost loop of a given loop nest or from the innermost loop to the outer loops. In a companion paper, we proposed a ...
Hongbo Rong, Alban Douillet, Ramaswamy Govindaraja...
ASPDAC
2006
ACM
140views Hardware» more  ASPDAC 2006»
14 years 4 months ago
A near optimal deblocking filter for H.264 advanced video coding
- We propose a near optimal hardware architecture for deblocking filter in H.264/MPEG-4 AVC. We propose a novel filtering order and a data reuse strategy that result in significant...
Shen-Yu Shih, Cheng-Ru Chang, Youn-Long Lin
BWCCA
2010
13 years 5 months ago
Advanced Design Issues for OASIS Network-on-Chip Architecture
Network-on-Chip (NoC) architectures provide a good way of realizing efficient interconnections and largely alleviate the limitations of bus-based solutions. NoC has emerged as a so...
Kenichi Mori, Adam Esch, Abderazek Ben Abdallah, K...