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» An Algorithm for Computing the Integral Closure
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DAC
2009
ACM
14 years 2 months ago
Clock skew optimization via wiresizing for timing sign-off covering all process corners
Manufacturing process variability impacts the performance of synchronous logic circuits by means of its effect on both clock network and functional block delays. Typically, varia...
Sari Onaissi, Khaled R. Heloue, Farid N. Najm
CCS
2009
ACM
14 years 2 months ago
Scalable onion routing with torsk
We introduce Torsk, a structured peer-to-peer low-latency anonymity protocol. Torsk is designed as an interoperable replacement for the relay selection and directory service of th...
Jon McLachlan, Andrew Tran, Nicholas Hopper, Yongd...
FOCS
2008
IEEE
14 years 1 months ago
Beating the Random Ordering is Hard: Inapproximability of Maximum Acyclic Subgraph
We prove that approximating the Max Acyclic Subgraph problem within a factor better than 1/2 is Unique-Games hard. Specifically, for every constant ε > 0 the following holds:...
Venkatesan Guruswami, Rajsekar Manokaran, Prasad R...
ACMACE
2006
ACM
14 years 1 months ago
Wireless home entertainment center: reducing last hop delays for real-time applications
Future digital entertainment services available to home users will share several characteristics: i) they will be deployed and delivered through the Internet, ii) a single media c...
Claudio E. Palazzi, Giovanni Pau, Marco Roccetti, ...
ISPD
2005
ACM
188views Hardware» more  ISPD 2005»
14 years 28 days ago
A semi-persistent clustering technique for VLSI circuit placement
Placement is a critical component of today's physical synthesis flow with tremendous impact on the final performance of VLSI designs. However, it accounts for a significant p...
Charles J. Alpert, Andrew B. Kahng, Gi-Joon Nam, S...