Sciweavers

3108 search results - page 312 / 622
» An Approach to Incremental Design of Distributed Embedded Sy...
Sort
View
128
Voted
DAC
2000
ACM
16 years 5 months ago
Memory aware compilation through accurate timing extraction
Memory delays represent a major bottleneck in embedded systems performance. Newer memory modules exhibiting efficient access modes (e.g., page-, burst-mode) partly alleviate this ...
Peter Grun, Nikil D. Dutt, Alexandru Nicolau
IPPS
2003
IEEE
15 years 10 months ago
Multi-Paradigm Framework for Parallel Image Processing
A software framework for the parallel execution of sequential programs using C++ classes is presented. The functional language Concurrent ML is used to implement the underlying ha...
David J. Johnston, Martin Fleury, Andy C. Downton
150
Voted
CASES
2010
ACM
15 years 2 months ago
Balancing memory and performance through selective flushing of software code caches
Dynamic binary translators (DBTs) are becoming increasingly important because of their power and flexibility. However, the high memory demands of DBTs present an obstacle for all ...
Apala Guha, Kim M. Hazelwood, Mary Lou Soffa
183
Voted
HIPC
2000
Springer
15 years 8 months ago
Applying Patterns to Improve the Performance of Fault Tolerant CORBA
An increasing number of mission-critical, embedded, telecommunications, and financial distributed systems are being developed using distributed object computing middleware, such a...
Balachandran Natarajan, Aniruddha S. Gokhale, Shal...
IWCMC
2006
ACM
15 years 10 months ago
A heuristics based approach for cellular mobile network planning
Designing and planning of the switching, signaling and support network is a fairly complex process in cellular mobile network. In this paper, the problem of assigning cells to swi...
Marwan H. Abu-Amara, Sadiq M. Sait, Abdul Subhan