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    ASE
    2005
    137views more  ASE 2005»
    Rewriting-Based Techniques for Runtime Verification
    13 years 8 months ago
    Rewriting-Based Techniques for Runtime Verification
    Download  www.havelund.com
    Techniques for efficiently evaluating future time Linear Temporal Logic (abbreviated LTL) formulae on finite execution traces are presented. While the standard models of LTL are i...
    Grigore Rosu, Klaus Havelund
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    COMPSYSTECH
    2009
    190views Hardware» more  COMPSYSTECH 2009»
    A Bayesian approach to recognise facial expressions using vector flows
    13 years 6 months ago
    A Bayesian approach to recognise facial expressions using vector flows
    Download  www.mmi.tudelft.nl
    : Facial expressions play an important role in human nonverbal communication. They can be generated by activation and dilatation of facial muscles. In this paper we describe a syst...
    Xiaofan Sun, Léon J. M. Rothkrantz, Dragos ...
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    JUCS
    2007
    95views more  JUCS 2007»
    Using Place Invariants and Test Point Placement to Isolate Faults in Discrete Event Systems
    13 years 8 months ago
    Using Place Invariants and Test Point Placement to Isolate Faults in Discrete Event Systems
    Download  www.jucs.org
    : This paper describes a method of using Petri net P-invariants in system diagnosis. To model this process a net oriented fault classification is presented. Hence, the considered d...
    Iwan Tabakow
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    CPE
    1994
    Springer
    170views Hardware» more  CPE 1994»
    Automatic Scalability Analysis of Parallel Programs Based on Modeling Techniques
    14 years 1 months ago
    Automatic Scalability Analysis of Parallel Programs Based on Modeling Techniques
    Download  www.cs.uoregon.edu
    When implementingparallel programs forparallel computer systems the performancescalability of these programs should be tested and analyzed on different computer configurations and...
    Allen D. Malony, Vassilis Mertsiotakis, Andreas Qu...
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    ISSTA
    2009
    ACM
    117views Software Engineering» more  ISSTA 2009»
    Specifying the worst case: orthogonal modeling of hardware errors
    14 years 3 months ago
    Specifying the worst case: orthogonal modeling of hardware errors
    Download  www4.in.tum.de
    During testing, the execution of valid cases is only one part of the task. Checking the behavior in boundary situations and in the presence of errors is an equally important subje...
    Jewgenij Botaschanjan, Benjamin Hummel
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