RISC processors can be used to face the ever increasing demand for performance required by embedded systems. Nevertheless, this solution comes with the cost of poor code density. ...
Leonardo Luiz Ecco, Bruno Cardoso Lopes, Eduardo C...
The proliferation of Chip Multiprocessors (CMPs) has led to the integration of large on-chip caches. For scalability reasons, a large on-chip cache is often divided into smaller ba...
Ping Zhou, Bo Zhao, Yu Du, Yi Xu, Youtao Zhang, Ju...
Abstract. This paper considers the dynamic tree (DT) model, first introduced in [1]. A dynamic tree specifies a prior over structures of trees, each of which is a forest of one or ...
Sub-Nyquist sampling techniques for Wireless Sensor Networks (WSN) are gaining increasing attention as an alternative method to capture natural events with desired quality while mi...
- We present an architecture for data streams based on structures typically found in web cache hierarchies. The main idea is to build a meta level analyser from a number of levels ...
Geoffrey Holmes, Bernhard Pfahringer, Richard Kirk...