710 search results - page 45 / 142 » An Architecture for Exploring Large Design Spaces |
NOCS
2007
IEEE
14 years 2 months ago
2007
IEEE
Network-on-Chip (NoC) architectures have a wide variety of parameters that can be adapted to the designer’s requirements. Fast exploration of this parameter space is only possib...
ISSS
2000
IEEE
14 years 3 days ago
2000
IEEE
Efficient use of an optimized custom memory hierarchy to exploit temporal locality in the memory accesses on array signals can have a very large impact on the power consumption i...
ASPDAC
2005
ACM
13 years 9 months ago
2005
ACM
— Architecture Description Languages (ADLs) are widely used to perform design space exploration for Application Specific Instruction Set Processors (ASIPs). While the design spa...
ICMCS
2010
IEEE
13 years 8 months ago
2010
IEEE
This paper introduces an interface platform to visualize location-specific media on lightweight displays that are placed and moved over a two dimensional map. The position of each...
SAMOS
2007
Springer
14 years 1 months ago
2007
Springer
As multi-processor system-on-chip (MPSoC) has become an effective solution to ever-increasing design complexity of modern embedded systems, fast and accurate HW/SW cosimulation of...