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» An Architecture for Exploring Large Design Spaces
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SI3D
1995
ACM
13 years 11 months ago
The Sort-First Rendering Architecture for High-Performance Graphics
Interactive graphics applications have long been challenging graphics system designers by demanding machines that can provide ever increasing polygon rendering performance. Anothe...
Carl Mueller
APCCAS
2006
IEEE
251views Hardware» more  APCCAS 2006»
14 years 1 months ago
Implementation of a H.264 decoder with Template-based Communication Refinement
We described an H.264 decoder implemented with our design methodology, in which a system function model of transaction level is first captured in SystemC and refined into RTL with ...
Sang-yong Yoon, Sanggyu Park, Soolk Chae
GECCO
2003
Springer
103views Optimization» more  GECCO 2003»
14 years 1 months ago
Evaluation of Parameter Sensitivity for Portable Embedded Systems through Evolutionary Techniques
Power consumption and portability issues are becoming increasingly significant in embedded system architectures. Therefore, it is important that chip architects and integrated circ...
James Northern III, Michael A. Shanblatt
VLSI
2007
Springer
14 years 1 months ago
Simulation of hybrid computer architectures: simulators, methodologies and recommendations
— In the future, high performance computing systems may consist of multiple multicore processors and reconfigurable logic coprocessors. Industry trends indicate that such coproc...
Pranav Vaidya, Jaehwan John Lee
IPPS
2002
IEEE
14 years 22 days ago
Variable Partitioning and Scheduling of Multiple Memory Architectures for DSP
Multiple memory module architecture enjoys higher memory access bandwidth and thus higher performance. Two key problems in gaining high performance in this kind of architecture ar...
Qingfeng Zhuge, Bin Xiao, Edwin Hsing-Mean Sha