239 search results - page 17 / 48 » An Architecture for Kernel-Level Verification of Executables... |
EUROPAR
2009
Springer
14 years 15 days ago
2009
Springer
Abstract. In the field of HPC, the current hardware trend is to design multiprocessor architectures that feature heterogeneous technologies such as specialized coprocessors (e.g., ...
CODES
2010
IEEE
13 years 6 months ago
2010
IEEE
Today, mobile smartphones are expected to be able to run the same complex, algorithm-heavy, memory-intensive applications that were originally designed and coded for generalpurpos...
ASPDAC
2006
ACM
14 years 2 months ago
2006
ACM
- Early estimation of the execution time of Real-Time embedded SW is an essential task in complex, HW/SW embedded system design. Application SW execution time estimation requires t...
VLDB
1999
ACM
14 years 26 days ago
1999
ACM
Recent high-performance processors employ sophisticated techniques to overlap and simultaneously execute multiple computation and memory operations. Intuitively, these techniques ...
DAC
2009
ACM
14 years 9 months ago
2009
ACM
Boolean satisfiability (SAT) solvers are used heavily in hardware and software verification tools for checking satisfiability of Boolean formulas. Most state-of-the-art SAT solver...