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ARC
2008
Springer
112views Hardware» more  ARC 2008»
13 years 10 months ago
Optimal Unroll Factor for Reconfigurable Architectures
Abstract. Loops are an important source of optimization. In this paper, we address such optimizations for those cases when loops contain kernels mapped on reconfigurable fabric. We...
Ozana Silvia Dragomir, Elena Moscu Panainte, Koen ...
DSD
2008
IEEE
104views Hardware» more  DSD 2008»
13 years 8 months ago
A Look-Ahead Task Management Unit for Embedded Multi-Core Architectures
Efficient utilization of multi-core architectures relies on the partitioning of applications into tasks and mapping the tasks to cores. In some applications (e.g. H.264 video deco...
Magnus Själander, Andrei Terechko, Marc Duran...
IFE
2010
87views more  IFE 2010»
13 years 5 months ago
A middleware for efficient stream processing in CUDA
This paper presents a middleware capable of out-of-order execution of kernels and data transfers for efficient stream processing in the compute unified device architecture (CUDA). ...
Shinta Nakagawa, Fumihiko Ino, Kenichi Hagihara
CC
2008
Springer
240views System Software» more  CC 2008»
13 years 10 months ago
Hardware JIT Compilation for Off-the-Shelf Dynamically Reconfigurable FPGAs
JIT compilation is a model of execution which translates at run time critical parts of the program to a low level representation. Typically a JIT compiler produces machine code fro...
Etienne Bergeron, Marc Feeley, Jean-Pierre David
MOBISYS
2005
ACM
14 years 8 months ago
Slingshot: deploying stateful services in wireless hotspots
Given a sufficiently good network connection, even a handheld computer can run extremely resource-intensive applications by executing the demanding portions on a remote server. At...
Ya-Yunn Su, Jason Flinn