286 search results - page 49 / 58 » An Efficient Hardware Implementation of Feed-Forward Neural ... |
IEEEHPCS
2010
13 years 5 months ago
2010
Network Multimedia data also need to be encrypted to protect private content and access control. Considering performance constraints and embedded system issues, many hardware solu...
HPCA
2011
IEEE
13 years 2 months ago
2011
IEEE
Traditional architectural designs are normally focused on CPUs and have been often decoupled from I/O considerations. They are inefficient for high-speed network processing with a...
TPDS
1998
13 years 10 months ago
1998
—Three-dimensional packaging technologies are critical for enabling ultra-compact, massively parallel processors (MPPs) for embedded applications. Through-wafer optical interconn...
SIGMETRICS
2008
ACM
13 years 10 months ago
2008
ACM
Per-flow network measurement at Internet backbone links requires the efficient maintanence of large arrays of statistics counters at very high speeds (e.g. 40 Gb/s). The prevailin...
FPGA
2004
ACM
14 years 4 months ago
2004
ACM
In this paper, an efficient implementation of a high performance coarse-grain reconfigurable data-path on a mixed-granularity reconfigurable platform is presented. It consists of ...