955 search results - page 59 / 191 » An Evaluation of Current High-Performance Networks |
133
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RTSS
2006
IEEE
15 years 10 months ago
2006
IEEE
In this paper, we describe the design and evaluation of a scheduler (referred to as Everest) for allocating processors to services in high performance, multi-service routers. A sc...
141
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ICS
2005
Tsinghua U.
15 years 9 months ago
2005
Tsinghua U.
We propose an organization for the on-chip memory system of a chip multiprocessor, in which 16 processors share a 16MB pool of 256 L2 cache banks. The L2 cache is organized as a n...
140
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ICS
2005
Tsinghua U.
15 years 9 months ago
2005
Tsinghua U.
As network traffic continues to increase and with the requirement to process packets at line rates, high performance routers need to forward millions of packets every second. Eve...
129
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CCGRID
2002
IEEE
15 years 9 months ago
2002
IEEE
Porting large applications to distributed computing platforms is a challenging task from a software engineering perspective. The Computational Grid has gained tremendous popularit...
124
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ERSA
2006
15 years 5 months ago
2006
Reconfigurable supercomputing (RSC) combines programmable logic chips with high performance microprocessors, all communicating over a high bandwidth, low latency interconnection n...