260 search results - page 25 / 52 » An FPGA Implemented Processor Architecture with Adaptive Res... |
ERSA
2006
13 years 9 months ago
2006
- An intrinsic embedded online evolution system has been designed using Block-based neural networks and implemented on Xilinx VirtexIIPro FPGAs. The designed network can dynamicall...
FPL
2009
Springer
14 years 15 days ago
2009
Springer
In this paper we present a verification platform designed for HyperTransport 3.x (HT3) applications. HyperTransport 3.x is a very low latency and high bandwidth chip-tochip interc...
DEXA
2000
Springer
13 years 11 months ago
2000
Springer
The Esprit project PRODNET II1 (Production Planning and Management in an Extended Enterprise) had as its main objective the development of a reference architecture and a support in...
IPPS
2006
IEEE
14 years 1 months ago
2006
IEEE
Digital Down Conversion (DDC) is an algorithm, used to lower the amount of samples per second by selecting a limited frequency band out of a stream of samples. A possible DDC algo...
APCSAC
2005
IEEE
14 years 1 months ago
2005
IEEE
Multimedia devices demands a platform integrated various functional modules and an increasing support of multiple standards. Stream architecture is able to solve the problem. Howev...