Sciweavers

1079 search results - page 10 / 216
» An Implementation of an Address Generator Using Hash Memorie...
Sort
View
HPCA
2004
IEEE
14 years 9 months ago
Using Prime Numbers for Cache Indexing to Eliminate Conflict Misses
Using alternative cache indexing/hashing functions is a popular technique to reduce conflict misses by achieving a more uniform cache access distribution across the sets in the ca...
Mazen Kharbutli, Keith Irwin, Yan Solihin, Jaejin ...
ISI
2007
Springer
14 years 3 months ago
Using Digital Chains of Custody on Constrained Devices to Verify Evidence
—A digital chain of custody is an account documenting digital data at a particular place and time. This paper gives a method of validating and authenticating a digital chain of c...
Phillip G. Bradford, Daniel A. Ray
IPPS
2005
IEEE
14 years 2 months ago
Fast Address Translation Techniques for Distributed Shared Memory Compilers
The Distributed Shared Memory (DSM) model is designed to leverage the ease of programming of the shared memory paradigm, while enabling the highperformance by expressing locality ...
François Cantonnet, Tarek A. El-Ghazawi, Pa...
ICS
2009
Tsinghua U.
14 years 3 months ago
Computer generation of fast fourier transforms for the cell broadband engine
The Cell BE is a multicore processor with eight vector accelerators (called SPEs) that implement explicit cache management through direct memory access engines. While the Cell has...
Srinivas Chellappa, Franz Franchetti, Markus P&uum...
ISCAS
2003
IEEE
114views Hardware» more  ISCAS 2003»
14 years 2 months ago
On the hardware implementations of the SHA-2 (256, 384, 512) hash functions
Couple to the communications wired and unwired networks growth, is the increasing demand for strong secure data transmission. New cryptographic standards are developed, and new en...
Nicolas Sklavos, Odysseas G. Koufopavlou