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ATS
2009
IEEE
127views Hardware» more  ATS 2009»
14 years 2 months ago
On the Generation of Functional Test Programs for the Cache Replacement Logic
Caches are crucial components in modern processors (both stand-alone or integrated into SoCs) and their test is a challenging task, especially when addressing complex and high-fre...
Wilson J. Perez, Danilo Ravotto, Edgar E. Sá...
ITC
1996
IEEE
98views Hardware» more  ITC 1996»
14 years 1 months ago
Mixed-Mode BIST Using Embedded Processors
Abstract. In complex systems, embedded processors may be used to run software routines for test pattern generation and response evaluation. For system components which are not comp...
Sybille Hellebrand, Hans-Joachim Wunderlich, Andre...
IJHR
2008
117views more  IJHR 2008»
13 years 9 months ago
Implementation of Cognitive Control for a Humanoid Robot
Engineers have long used control systems utilizing models and feedback loops to control realworld systems. Limitations of model-based control led to a generation of intelligent co...
Kazuhiko Kawamura, Stephen M. Gordon, Palis Ratana...
CCGRID
2005
IEEE
14 years 2 months ago
Secret sequence comparison on public grid computing resources
Once a new gene has been sequenced, it must be verified whether or not it is similar to previously sequenced genes. In many cases, the organization that sequenced a potentially n...
Ken-ichi Kurata, Hiroshi Nakamura, Vincent Breton
SPIN
2010
Springer
13 years 7 months ago
An Automata-Based Symbolic Approach for Verifying Programs on Relaxed Memory Models
This paper addresses the problem of verifying programs for the relaxed memory models implemented in modern processors. Specifically, it considers the TSO (Total Store Order) relax...
Alexander Linden, Pierre Wolper