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ASPDAC
2001
ACM
137views Hardware» more  ASPDAC 2001»
13 years 11 months ago
Optimized address assignment for DSPs with SIMD memory accesses
This paper deals with address assignment in code generation for digital signal processors (DSPs) with SIMD (single instruction multiple data) memory accesses. In these processors ...
Markus Lorenz, David Koffmann, Steven Bashford, Ra...
INFOCOM
2006
IEEE
14 years 1 months ago
Reverse Hashing for High-Speed Network Monitoring: Algorithms, Evaluation, and Applications
— A key function for network traffic monitoring and analysis is the ability to perform aggregate queries over multiple data streams. Change detection is an important primitive w...
Robert T. Schweller, Zhichun Li, Yan Chen, Yan Gao...
ITCC
2002
IEEE
14 years 19 days ago
FSM Implementation in Embedded Memory Blocks of Programmable Logic Devices Using Functional Decomposition
: Since modern programmable devices contain embedded memory blocks, there exists a possibility to implement Finite State Machines (FSM) using such blocks. The size of the memory av...
Henry Selvaraj, Mariusz Rawski, Tadeusz Luba
IJSN
2007
106views more  IJSN 2007»
13 years 7 months ago
Hash-AV: fast virus signature scanning by cache-resident filters
Abstract— Fast virus scanning is becoming increasingly important in today’s Internet. While Moore’s law continues to double CPU cycle speed, virus scanning applications fail ...
Ozgun Erdogan, Pei Cao
INFOCOM
2007
IEEE
14 years 2 months ago
TriBiCa: Trie Bitmap Content Analyzer for High-Speed Network Intrusion Detection
Abstract—Deep packet inspection (DPI) is often used in network intrusion detection and prevention systems (NIDPS), where incoming packet payloads are compared against known attac...
N. Sertac Artan, H. Jonathan Chao