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APCSAC
2001
IEEE
14 years 24 days ago
High-Performance Extendable Instruction Set Computing
In this paper, a new architecture called the extendable instruction set computer (EISC) is introduced that addresses the issues of memory size and performance in embedded micropro...
Heui Lee, Paul Becket, Bill Appelbe
ADHOCNOW
2005
Springer
14 years 2 months ago
Enhancing the Security of On-demand Routing in Ad Hoc Networks
We present the Ad-hoc On-demand Secure Routing (AOSR) protocol, which uses pairwise shared keys between pairs of mobile nodes and hash values keyed with them to verify the validity...
Zhenjiang Li, J. J. Garcia-Luna-Aceves
ASPLOS
2012
ACM
12 years 4 months ago
Applying transactional memory to concurrency bugs
Multithreaded programs often suffer from synchronization bugs such as atomicity violations and deadlocks. These bugs arise from complicated locking strategies and ad hoc synchroni...
Haris Volos, Andres Jaan Tack, Michael M. Swift, S...
COMPSAC
2009
IEEE
14 years 1 months ago
Towards a Next-Generation Matrix Library for Java
Matrices are essential in many fields of computer science, especially when large amounts of data must be handled efficiently. Despite this demand for matrix software, we were una...
Holger Arndt, Markus Bundschus, Andreas Naegele
POPL
2010
ACM
14 years 6 months ago
On the Verification Problem for Weak Memory Models
We address the verification problem of finite-state concurrent programs running under weak memory models. These models capture the reordering of program (read and write) operation...
Ahmed Bouajjani, Madanlal Musuvathi, Mohamed Faouz...