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DAC
2000
ACM
14 years 8 months ago
Memory aware compilation through accurate timing extraction
Memory delays represent a major bottleneck in embedded systems performance. Newer memory modules exhibiting efficient access modes (e.g., page-, burst-mode) partly alleviate this ...
Peter Grun, Nikil D. Dutt, Alexandru Nicolau
DAC
2009
ACM
13 years 11 months ago
Reduction techniques for synchronous dataflow graphs
The Synchronous Dataflow (SDF) model of computation is popular for modelling the timing behaviour of real-time embedded hardware and software systems and applications. It is an es...
Marc Geilen
CASES
2010
ACM
13 years 5 months ago
Improved procedure placement for set associative caches
The performance of most embedded systems is critically dependent on the memory hierarchy performance. In particular, higher cache hit rate can provide significant performance boos...
Yun Liang, Tulika Mitra
INFORMATICALT
2010
101views more  INFORMATICALT 2010»
13 years 6 months ago
An Improved Differential Evolution Scheme for the Solution of Large-Scale Unit Commitment Problems
This paper presents an improved differential evolution (IDE) method for the solution of large-scale unit commitment (UC) problems. The objective of the proposed scheme is to determ...
Chen-Sung Chang
EMSOFT
2007
Springer
14 years 1 months ago
Optimal task placement to improve cache performance
Most recent embedded systems use caches to improve their average performance. Current timing analyses are able to compute safe timing guarantees for these systems, if tasks are ru...
Gernot Gebhard, Sebastian Altmeyer