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FDL
2004
IEEE
15 years 8 months ago
A Formal Verification Approach for IP-based Designs
This paper proposes a formal verification methodology which is smoothly integrated with component-based system-level design, using a divide and conquer approach. The methodology a...
Daniel Karlsson, Petru Eles, Zebo Peng
WSC
2004
15 years 5 months ago
Implementing the High Level Architecture in the Virtual Test Bed
The Virtual Test Bed (VTB) is a prototype of a virtual engineering environment to study operations of current and future space vehicles, spaceports, and ranges. The HighLevel Arch...
José A. Sepúlveda, Luis C. Rabelo, J...
PDSE
1998
126views more  PDSE 1998»
15 years 5 months ago
Validation and Test Generation for Object-Oriented Distributed Software
The development of correct OO distributed software is a daunting task as soon as the distributed interactions are not trivial. This is due to the inherent complexity of distribute...
Thierry Jéron, Jean-Marc Jézé...
ARC
2006
Springer
88views Hardware» more  ARC 2006»
15 years 8 months ago
Integrating Custom Instruction Specifications into C Development Processes
Abstract. We describe a new approach for creating hardware description language (HDL) specifications for custom instructions, to form part of the instruction-set architecture (ISA)...
Jack Whitham, Neil C. Audsley
STTT
2010
126views more  STTT 2010»
15 years 2 months ago
Towards an industrial grade IVE for Java and next generation research platform for JML
Tool support for the Java Modeling Language (JML) is a very pressing problem. A main issue with current tools is their architecture: the cost of keeping up with the evolution of Ja...
Patrice Chalin, Robby, Perry R. James, Jooyong Lee...