71 search results - page 6 / 15 » An auto-tuning framework for parallel multicore stencil comp... |
IPPS
2010
IEEE
13 years 5 months ago
2010
IEEE
It is possible to implement the parallel random access machine (PRAM) on a chip multiprocessor (CMP) efficiently with an emulated shared memory (ESM) architecture to gain easy par...
IPPS
2009
IEEE
14 years 2 months ago
2009
IEEE
A metascalable (or “design once, scale on new architectures”) parallel computing framework has been developed for large spatiotemporal-scale atomistic simulations of materials...
CISIS
2008
IEEE
13 years 9 months ago
2008
IEEE
While memory-safe and type-safe languages have been available for many years, the vast majority of software is still implemented in type-unsafe languages such as C/C++. Despite ma...
IEEEPACT
2005
IEEE
14 years 1 months ago
2005
IEEE
Helper threading is a technique that utilizes a second core or logical processor in a multi-threaded system to improve the performance of the main thread. A helper thread executes...
CCGRID
2010
IEEE
13 years 8 months ago
2010
IEEE
Map-reduce framework has received a significant attention and is being used for programming both large-scale clusters and multi-core systems. While the high productivity aspect of ...