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» An improvement in formal verification
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CAV
2007
Springer
129views Hardware» more  CAV 2007»
14 years 4 months ago
The Why/Krakatoa/Caduceus Platform for Deductive Program Verification
Jean-Christophe Filliâtre, Claude March&eacu...
MEMOCODE
2010
IEEE
13 years 7 months ago
Proving transaction and system-level properties of untimed SystemC TLM designs
Electronic System Level (ESL) design manages the complexity of todays systems by using abstract models. In this context Transaction Level Modeling (TLM) is state-of-theart for desc...
Daniel Große, Hoang M. Le, Rolf Drechsler
ACSAC
2006
IEEE
14 years 4 months ago
Engineering Sufficiently Secure Computing
We propose an architecture of four complimentary technologies increasingly relevant to a growing number of home users and organizations: cryptography, separation kernels, formal v...
Brian Witten
ACSC
2004
IEEE
14 years 1 months ago
Verification of the Futurebus+ Cache Coherence protocol: A case study in model checking
This paper presents a case study for automatic verification using the Communicating Sequential Processes formalism. The case study concerns the Futurebus+ cache coherency standard...
Kylie Williams, Robert Esser