Sciweavers

91 search results - page 15 / 19
» An integer linear programming based approach for parallelizi...
Sort
View
CASES
2006
ACM
15 years 12 months ago
Integrated scratchpad memory optimization and task scheduling for MPSoC architectures
Multiprocessor system-on-chip (MPSoC) is an integrated circuit containing multiple instruction-set processors on a single chip that implements most of the functionality of a compl...
Vivy Suhendra, Chandrashekar Raghavan, Tulika Mitr...
ECRTS
2008
IEEE
16 years 10 days ago
Predictable Code and Data Paging for Real Time Systems
There is a need for using virtual memory in real-time applications: using virtual addressing provides isolation between concurrent processes; in addition, paging allows the execut...
Damien Hardy, Isabelle Puaut
ASPDAC
2006
ACM
109views Hardware» more  ASPDAC 2006»
15 years 12 months ago
Energy savings through embedded processing on disk system
Abstract— Many of today’s data-intensive applications manipulate disk-resident data sets. As a result, their overall behavior is tightly coupled with their disk performance. Un...
Seung Woo Son, Guangyu Chen, Mahmut T. Kandemir, F...
CPHYSICS
2010
135views more  CPHYSICS 2010»
15 years 6 months ago
An events based algorithm for distributing concurrent tasks on multi-core architectures
In this paper, a programming model is presented which enables scalable parallel performance on multi-core shared memory architectures. The model has been developed for application...
David W. Holmes, John R. Williams, Peter Tilke
HPDC
2006
IEEE
15 years 12 months ago
Task Scheduling and File Replication for Data-Intensive Jobs with Batch-shared I/O
This paper addresses the problem of efficient execution of a batch of data-intensive tasks with batch-shared I/O behavior, on coupled storage and compute clusters. Two scheduling...
Gaurav Khanna 0002, Nagavijayalakshmi Vydyanathan,...