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FCCM
2005
IEEE
131views VLSI» more  FCCM 2005»
14 years 1 months ago
Automating the Layout of Reconfigurable Subsystems Using Circuit Generators
When designing systems-on-a-chip (SoCs), a unique opportunity exists to generate custom FPGA architectures that are specific to the application domain in which the device will be ...
Shawn Phillips, Scott Hauck
ICS
2005
Tsinghua U.
14 years 1 months ago
Think globally, search locally
A key step in program optimization is the determination of optimal values for code optimization parameters such as cache tile sizes and loop unrolling factors. One approach, which...
Kamen Yotov, Keshav Pingali, Paul Stodghill
TOG
2008
135views more  TOG 2008»
13 years 8 months ago
Anisotropic noise
Programmable graphics hardware makes it possible to generate procedural noise textures on the fly for interactive rendering. However, filtering and antialiasing procedural noise i...
Alexander Goldberg, Matthias Zwicker, Frédo...
ICPP
1998
IEEE
14 years 9 days ago
A memory-layout oriented run-time technique for locality optimization
Exploiting locality at run-time is a complementary approach to a compiler approach for those applications with dynamic memory access patterns. This paper proposes a memory-layout ...
Yong Yan, Xiaodong Zhang, Zhao Zhang
CC
2008
Springer
193views System Software» more  CC 2008»
13 years 10 months ago
Automatic Transformations for Communication-Minimized Parallelization and Locality Optimization in the Polyhedral Model
The polyhedral model provides powerful abstractions to optimize loop nests with regular accesses. Affine transformations in this model capture a complex sequence of execution-reord...
Uday Bondhugula, Muthu Manikandan Baskaran, Sriram...