3120 search results - page 590 / 624 » An optimal architecture for a DDC |
GECCO
2007
Springer
14 years 3 months ago
2007
Springer
Connectivity patterns in biological brains exhibit many repeating motifs. This repetition mirrors inherent geometric regularities in the physical world. For example, stimuli that ...
LCTRTS
2007
Springer
14 years 3 months ago
2007
Springer
The run-time performance of VLIW (very long instruction word) microprocessors depends heavily on the effectiveness of its associated optimizing compiler. Typical VLIW compiler pha...
CLUSTER
2006
IEEE
14 years 3 months ago
2006
IEEE
As new processor and memory architectures advance, clusters start to be built from larger SMP systems, which makes MPI intra-node communication a critical issue in high performanc...
ICDCS
2006
IEEE
14 years 3 months ago
2006
IEEE
The Internet is a hierarchical architecture comprising heterogeneous entities of privately owned infrastructures, where higher level Internet service providers (ISPs) supply conne...
IEEEPACT
2006
IEEE
14 years 3 months ago
2006
IEEE
As chip multiprocessors (CMPs) become increasingly mainstream, architects have likewise become more interested in how best to share a cache hierarchy among multiple simultaneous t...