91 search results - page 18 / 19 » An optimal memory allocation scheme for scratch-pad-based em... |
LCTRTS
2007
Springer
14 years 1 months ago
2007
Springer
The run-time performance of VLIW (very long instruction word) microprocessors depends heavily on the effectiveness of its associated optimizing compiler. Typical VLIW compiler pha...
TMC
2012
11 years 9 months ago
2012
—This article1 presents the design of a networked system for joint compression, rate control and error correction of video over resource-constrained embedded devices based on the...
FPGA
2010
ACM
13 years 7 months ago
2010
ACM
We use reconfigurable hardware to construct a high throughput Bayesian computing machine (BCM) capable of evaluating probabilistic networks with arbitrary DAG (directed acyclic gr...
DATE
2008
IEEE
14 years 1 months ago
2008
IEEE
We present a novel methodology for design space exploration using a two-steps scheme to optimize the number of virtual channel buffers (buffers take the premier share of the route...
CASES
2006
ACM
14 years 28 days ago
2006
ACM
Previous object code compression schemes have employed static and semiadaptive compression algorithms to reduce the size of instruction memory in embedded systems. The suggestion ...