75 search results - page 4 / 15 » Analysis and Design of Active IC Metering Schemes |
IOLTS
2003
IEEE
14 years 20 days ago
2003
IEEE
On-chip global interconnections in very deep submicron technology (VDSM) ICs are becoming more sensitive and prone to errors caused by power supply noise, crosstalk noise, delay v...
ISCAS
2005
IEEE
14 years 1 months ago
2005
IEEE
—This paper is concerned with a new design method of low-sensitivity current-mode filters, which results from lowsensitivity voltage-mode filter design using impedance tapering. ...
DATE
2007
IEEE
14 years 1 months ago
2007
IEEE
— It has been the conventional assumption that, due to the superlinear dependence of leakage power consumption on temperature, and widely varying on-chip temperature profiles, a...
DAC
2001
ACM
14 years 8 months ago
2001
ACM
This work presents a new and computationally efficient performance optimization technique for distributed RLC interconnects based on a rigorous delay computation scheme. The new o...
ECML
2006
Springer
13 years 11 months ago
2006
Springer
Abstract. Designs of micro electro-mechanical devices need to be robust against fluctuations in mass production. Computer experiments with tens of parameters are used to explore th...