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» Analysis and Optimization of CHR Programs
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EMSOFT
2004
Springer
15 years 6 months ago
A methodology for generating verified combinatorial circuits
High-level programming languages offer significant expressivity but provide little or no guarantees about resource use. Resourcebounded languages -- such as hardware-description l...
Oleg Kiselyov, Kedar N. Swadi, Walid Taha
143
Voted
CASCON
2000
119views Education» more  CASCON 2000»
15 years 4 months ago
Efficient mapping of software system traces to architectural views
Information about a software system's execution can help a developer with many tasks, including software testing, performance tuning, and program understanding. In almost all...
Robert J. Walker, Gail C. Murphy, Jeffrey Steinbok...
99
Voted
CIDR
2009
159views Algorithms» more  CIDR 2009»
15 years 3 months ago
RIOT: I/O-Efficient Numerical Computing without SQL
R is a numerical computing environment that is widely popular for statistical data analysis. Like many such environments, R performs poorly for large datasets whose sizes exceed t...
Yi Zhang 0011, Herodotos Herodotou, Jun Yang 0001
115
Voted
RV
2010
Springer
122views Hardware» more  RV 2010»
15 years 1 months ago
Clara: A Framework for Partially Evaluating Finite-State Runtime Monitors Ahead of Time
Researchers have developed a number of runtime verification tools that generate runtime monitors in the form of AspectJ aspects. In this work, we present Clara, a novel framework ...
Eric Bodden, Patrick Lam, Laurie J. Hendren
134
Voted
PCI
2005
Springer
15 years 8 months ago
Tuning Blocked Array Layouts to Exploit Memory Hierarchy in SMT Architectures
Cache misses form a major bottleneck for memory-intensive applications, due to the significant latency of main memory accesses. Loop tiling, in conjunction with other program tran...
Evangelia Athanasaki, Kornilios Kourtis, Nikos Ana...