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ET
2007
119views more  ET 2007»
13 years 10 months ago
Analysis and Test of Resistive-Open Defects in SRAM Pre-Charge Circuits
In this paper, we present an exhaustive study on the influence of resistive-open defects in pre-charge circuits of SRAM memories. In SRAM memories, the pre-charge circuits operate...
Luigi Dilillo, Patrick Girard, Serge Pravossoudovi...
MTDT
2003
IEEE
164views Hardware» more  MTDT 2003»
14 years 4 months ago
Applying Defect-Based Test to Embedded Memories in a COT Model
ct Defect-based testing for digital logic concentrates primarily on methods of test application, including for example at-speed structural tests and IDDQ testing. In contrast, defe...
Robert C. Aitken
ITC
2003
IEEE
168views Hardware» more  ITC 2003»
14 years 4 months ago
A Built-In Self-Repair Scheme for Semiconductor Memories with 2-D Redundancy
Embedded memories are among the most widely used cores in current system-on-chip (SOC) implementations. Memory cores usually occupy a significant portion of the chip area, and do...
Jin-Fu Li, Jen-Chieh Yeh, Rei-Fu Huang, Cheng-Wen ...