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PLDI
1997
ACM
13 years 11 months ago
Data-centric Multi-level Blocking
We present a simple and novel framework for generating blocked codes for high-performance machines with a memory hierarchy. Unlike traditional compiler techniques like tiling, whi...
Induprakas Kodukula, Nawaaz Ahmed, Keshav Pingali
ICS
1999
Tsinghua U.
13 years 11 months ago
Improving memory hierarchy performance for irregular applications
The performance of irregular applications on modern computer systems is hurt by the wide gap between CPU and memory speeds because these applications typically underutilize multi-...
John M. Mellor-Crummey, David B. Whalley, Ken Kenn...
TVCG
2010
165views more  TVCG 2010»
13 years 2 months ago
Binary Mesh Partitioning for Cache-Efficient Visualization
Abstract--One important bottleneck when visualizing large data sets is the data transfer between processor and memory. Cacheaware (CA) and cache-oblivious (CO) algorithms take into...
Marc Tchiboukdjian, Vincent Danjean, Bruno Raffin
IFL
2000
Springer
13 years 11 months ago
Improving Cache Effectiveness through Array Data Layout Manipulation in SAC
Sac is a functional array processing language particularly designed with numerical applications in mind. In this field the runtime performance of programs critically depends on the...
Clemens Grelck
FOCS
2003
IEEE
14 years 25 days ago
The Cost of Cache-Oblivious Searching
This paper gives tight bounds on the cost of cache-oblivious searching. The paper shows that no cache-oblivious search structure can guarantee a search performance of fewer than l...
Michael A. Bender, Gerth Stølting Brodal, R...