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EUROPAR
2001
Springer
13 years 12 months ago
Using a Swap Instruction to Coalesce Loads and Stores
A swap instruction, which exchanges a value in memory with a value of a register, is available on many architectures. The primary application of a swap instruction has been for pro...
Apan Qasem, David B. Whalley, Xin Yuan, Robert van...
COORDINATION
2007
Springer
14 years 1 months ago
Component Connectors with QoS Guarantees
Connectors have emerged as a powerful concept for composition and coordination of concurrent activities encapsulated as components and services. Compositional coordination models a...
Farhad Arbab, Tom Chothia, Sun Meng, Young-Joo Moo...
HPCA
1999
IEEE
13 years 11 months ago
Using Lamport Clocks to Reason about Relaxed Memory Models
Cache coherence protocols of current shared-memory multiprocessors are difficult to verify. Our previous work proposed an extension of Lamport's logical clocks for showing th...
Anne Condon, Mark D. Hill, Manoj Plakal, Daniel J....
ICDCS
2010
IEEE
13 years 9 months ago
CacheCast: Eliminating Redundant Link Traffic for Single Source Multiple Destination Transfers
Due to the lack of multicast services in the Internet, applications based on single source multiple destinations transfers such as video conferencing, IP radio, IPTV must use unica...
Piotr Srebrny, Thomas Plagemann, Vera Goebel, Andr...
SKG
2006
IEEE
14 years 1 months ago
IAC: Interest-Aware Caching for Unstructured P2P
The simplicity and robustness of unstructured P2P system make it a preferable architecture for constructing real large scale file sharing system. Most of the existing paradigms re...
Xucheng Luo, Zhiguang Qin, Ji Geng, Jiaqing Luo