This paper presents theoretical yet practical methodologies to model, assure and optimize the Reliability of Clockless Wave Pipeline. Clockless wave pipeline is a cutting-edge and...
T. Feng, Nohpill Park, Yong-Bin Kim, Fabrizio Lomb...
This paper presents our experience mapping OpenMP parallel programming model to the IBM Cyclops-64 (C64) architecture. The C64 employs a many-core-on-a-chip design that integrates...
Traditionally, cache coherence in large-scale shared-memory multiprocessors has been ensured by means of a distributed directory structure stored in main memory. In this way, the ...
Hash functions play the most important role in various cryptologic applications, ranging from data integrity checking to digital signatures. Our goal is to introduce a new hash fu...
Dynamically Reconfigurable Processor (DRP)[1] developed by NEC Electronics is a coarse grain reconfigurable processor that selects a data path from the on-chip repository of sixte...