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RTSS
2008
IEEE
14 years 4 months ago
WCET Analysis of Multi-level Non-inclusive Set-Associative Instruction Caches
With the advent of increasingly complex hardware in realtime embedded systems (processors with performance enhancing features such as pipelines, cache hierarchy, multiple cores), ...
Damien Hardy, Isabelle Puaut
BIBE
2007
IEEE
174views Bioinformatics» more  BIBE 2007»
14 years 4 months ago
Shortest Path Approaches for the Longest Common Subsequence of a Set of Strings
—We investigate the k-LCS problem that is finding a longest common subsequence (LCS) for k given input strings. The problem is known to have practical solutions for k = 2, but f...
Marina Barsky, Ulrike Stege, Alex Thomo, Chris Upt...
IFIP
2007
Springer
14 years 3 months ago
In-Time Role-Specific Notification as Formal Means to Balance Agile Practices in Global Software Development Settings
In global software development (GSD) projects, distributed teams collaborate to deliver high-quality software. Project managers need to control these development projects, which in...
Dindin Wahyudin, Matthias Heindl, Benedikt Eckhard...
IPPS
2005
IEEE
14 years 3 months ago
User Transparent Parallel Processing of the 2004 NIST TRECVID Data Set
The Parallel-Horus framework, developed at the University of Amsterdam, is a unique software architecture that allows non-expert parallel programmers to develop fully sequential m...
Frank J. Seinstra, Cees Snoek, Dennis Koelma, Jan-...
EUC
2004
Springer
14 years 3 months ago
Non-uniform Set-Associative Caches for Power-Aware Embedded Processors
Abstract. Power consumption is becoming one of the most important constraints for microprocessor design in nanometer-scale technologies. Especially, as the transistor supply voltag...
Seiichiro Fujii, Toshinori Sato