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ISVLSI
2003
IEEE
115views VLSI» more  ISVLSI 2003»
15 years 11 months ago
Getting High-Performance Silicon from System-Level Design
System-level design techniques promise a way to lessen the productivity gap between fabrication and design. Unfortunately, these techniques have been slow to catch on, in part bec...
W. Rhett Davis
ISCC
2002
IEEE
15 years 10 months ago
Session level rollback recovery
The problem of rollback recovery is traditionally approached using a model oriented to packet delivery. Instead, we introduce a model centered around complex sessions, and we expl...
Augusto Ciuffoletti
ICPP
1996
IEEE
15 years 10 months ago
Mechanisms for Mapping High-Level Parallel Performance Data
A primary problem in the performance measurement of high-level parallel programming languages is to map lowlevel events to high-level programming constructs. We discuss several as...
R. Bruce Irvin, Barton P. Miller
VRML
1997
ACM
15 years 10 months ago
Lodestar: An Octree-Based Level of Detail Generator for VRML
Level of detail generation is important for managing geometric complexity of three-dimensional objects and virtual worlds. However, most algorithms that compute levels of detail do...
Dieter Schmalstieg
155
Voted
EURODAC
1995
IEEE
152views VHDL» more  EURODAC 1995»
15 years 9 months ago
Information model of a compound graph representation for system and architecture level design
In order to extract a suitable common core information model, design representations on both system and architecture levels are analyzed. Following the specification trajectory, ...
Peter Conradi