Sciweavers

3171 search results - page 6 / 635
» Application of Reduce Order Modeling to Time Parallelization
Sort
View
VTS
1997
IEEE
86views Hardware» more  VTS 1997»
13 years 12 months ago
Methods to reduce test application time for accumulator-based self-test
Accumulators based on addition or subtraction can be used as test pattern generators. Some circuits, however, require long test lengths if the parameters of the accumulator are no...
Albrecht P. Stroele, Frank Mayer
HPDC
1997
IEEE
13 years 12 months ago
Packing Messages as a Tool for Boosting the Performance of Total Ordering Protocols
This paper compares the throughput and latency of four protocols that provide total ordering. Two of these protocols are measured with and without message packing. We used a techn...
Roy Friedman, Robbert van Renesse
TACAS
2010
Springer
342views Algorithms» more  TACAS 2010»
14 years 2 months ago
SAT Based Bounded Model Checking with Partial Order Semantics for Timed Automata
We study the model checking problem of timed automata based on SAT solving. Our work investigates alternative possibilities for coding the SAT reductions that are based on parallel...
Janusz Malinowski, Peter Niebert
CIKM
2004
Springer
14 years 1 months ago
Approximating the top-m passages in a parallel question answering system
We examine the problem of retrieving the top-m ranked items from a large collection, randomly distributed across an n-node system. In order to retrieve the top m overall, we must ...
Charles L. A. Clarke, Egidio L. Terra
ICDCN
2011
Springer
12 years 11 months ago
Scheduling Randomly-Deployed Heterogeneous Video Sensor Nodes for Reduced Intrusion Detection Time
This paper proposes to use video sensor nodes to provide an efficient intrusion detection system. We use a scheduling mechanism that takes into account the criticality of the surve...
Congduc Pham