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GECCO
2003
Springer
283views Optimization» more  GECCO 2003»
15 years 9 months ago
A Game-Theoretic Memory Mechanism for Coevolution
One problem associated with coevolutionary algorithms is that of forgetting, where one or more previously acquired traits are lost only to be needed later. We introduce a new coevo...
Sevan G. Ficici, Jordan B. Pollack
ISCA
2002
IEEE
112views Hardware» more  ISCA 2002»
15 years 9 months ago
Drowsy Caches: Simple Techniques for Reducing Leakage Power
On-chip caches represent a sizable fraction of the total power consumption of microprocessors. Although large caches can significantly improve performance, they have the potential...
Krisztián Flautner, Nam Sung Kim, Steven M....
CODES
2000
IEEE
15 years 8 months ago
Towards a new standard for system-level design
—Huge new design challenges for system-on-chip (SoC) are the result of decreasing time-to-market coupled with rapidly increasing gate counts and embedded software representing 50...
Stan Y. Liao
HPCA
2000
IEEE
15 years 8 months ago
Register Organization for Media Processing
Processor architectures with tens to hundreds of arithmetic units are emerging to handle media processing applications. These applications, such as image coding, image synthesis, ...
Scott Rixner, William J. Dally, Brucek Khailany, P...
DOLAP
1999
ACM
15 years 8 months ago
starER: A Conceptual Model for Data Warehouse Design
Modeling data warehouses is a complex task focusing, very often, into internal structures and implementation issues. In this paper we argue that, in order to accurately reflect the...
Nectaria Tryfona, Frank Busborg, Jens G. Borch Chr...